This disclosure relates to a semiconductor device and it can be applied to a semiconductor device, for example, provided with hardware Intellectual Property (IP) of operating based on a register setting list.
A function block forming a Central Processing Unit (CPU) and a memory, and a Large-Scale Integration (LSI) such as a signal processing circuit is called “IP” (Intellectual Property) in a semiconductor field. The IP includes hardware (logical circuit diagram, LSI layout, etc.) and software (driver software, firmware, middleware, etc.) of each function block. Further, a System-on-a-Chip (SoC) is a method of mounting all the functions necessary for the operation of some device or system on one semiconductor chip, including hardware IP (hereinafter, referred to as H/W_IP) of various kinds of controllers and memories with the CPU fixed as the core. The prior technique related to this disclosure includes, for example, US Patent Application Publication No. 2010/0309511.
According to an increase in the number of H/W_IP mounted on a SoC and an increase in the frequency of interruption from each H/W_IP, the interruption processing time by a CPU has an increasing tendency. Further, a restriction on the control timing of H/W_IP by a CPU is getting severer with the faster rate.
Other objects and novel characteristics will be apparent from the description and the invention and the attached drawings.